The present invention relates to a semiconductor device and a method of manufacturing the semiconductor device and is suited for use in, for example, a semiconductor device having a nonvolatile memory cell and a method of manufacturing the semiconductor device.
Semiconductor devices having a memory cell region having therein, for example, a memory cell of a nonvolatile memory formed on a semiconductor substrate and a peripheral circuit region having therein a peripheral circuit comprised of, for example, a MISFET (metal insulator semiconductor field effect transistor) and formed on the semiconductor substrate have been used widely.
As the nonvolatile memory, a memory cell comprised of a split gate cell using a MONOS (metal-oxide-nitride-oxide semiconductor) film is sometimes used. This memory cell is comprised of two MISFETs, that is, a control transistor having a control gate electrode and a memory transistor having a memory gate electrode. When both a memory cell of such a nonvolatile memory and a MISFET configuring a peripheral circuit are loaded together on a semiconductor substrate, gate electrodes are formed in the respective regions.
For example, Patent Document 1 (Japanese Unexamined Patent Application Publication No. 2011-49282) discloses a method of manufacturing a semiconductor device including forming a MISFET from a high-k film and a metal gate electrode through a damascene process.
Patent Document 2 (Japanese Unexamined Patent Application Publication No. 2011-103332) and Patent Document 3 (Japanese Unexamined Patent Application Publication No. 2010-108976) disclose a semiconductor device having a nonvolatile memory and a MISFET formed in a peripheral circuit region. According to them, a high dielectric constant film is used as a gate insulating film of the MISFET.
Patent Document 4 (Japanese Unexamined Patent Application Publication No. 2010-87252) discloses a split gate transistor having a high dielectric constant film as a gate insulating film below a control gate electrode.
Patent Document 5 (Japanese Unexamined Patent Application Publication No. 2009-59927) discloses a method of manufacturing a nonvolatile semiconductor memory device including forming a memory gate electrode on the sidewall of a dummy gate and then removing the dummy gate to form a control gate electrode.
Patent Document 6 (Japanese Unexamined Patent Application Publication No. 2012-248652) discloses a split gate nonvolatile memory having a memory gate electrode made of a stacked film of a metal film and a silicon film thereon.